Senior PD Engineer - STA & Timing Closure

AMD · Hyderabad, India · Posted 5h ago · 8–10 yrs · Startup · Direct ATS

Job description

KEY RESPONSIBILITIES: Experience on Fullchip Timing analysis for multiple modes that includes Functional and DFT and interface special timing checks To have expertise in understanding and debugging timing issues in Fullchip level and block level. Experience on Floor-planning, Place & route, power and clock distribution, pin placement. Role involves interaction with multiple design teams, CAD teams

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